technique10 tMadFP1Serial
{
    pass pVS
    {
        VertexShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // position             0   xyzw        0     NONE  float   x   
            // val                  0   xyzw        1     NONE  float       
            //
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // val                  0   xyzw        0     NONE  float   xyzw
            // SV_Position          0   xyzw        1      POS  float   xyzw
            //
            vs_4_0
            dcl_input v0.x
            dcl_output o0.xyzw
            dcl_output_siv  o1.xyzw , position
            dcl_temps 1
            mad r0.x, v0.x, v0.x, v0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad o0.xyzw, r0.xxxx, r0.xxxx, r0.xxxx
            mov o1.xyzw, l(0.000000, 0.000000, 0.000000, -1.000000)
            ret 
            // Approximately 130 instruction slots used
                    
        };
        GeometryShader = NULL;
        PixelShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // no Input
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // SV_Target            0   xyzw        0     NONE  float   xyzw
            //
            ps_4_0
            dcl_output o0.xyzw
            mov o0.xyzw, l(0, 0, 0, 0)
            ret 
            // Approximately 2 instruction slots used
                    
        };
    }
    pass pPS
    {
        VertexShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // position             0   xyzw        0     NONE  float   xyzw
            // val                  0   xyzw        1     NONE  float   xyzw
            //
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // val                  0   xyzw        0     NONE  float   xyzw
            // val                  1   xyzw        1     NONE  float   xyzw
            // SV_Position          0   xyzw        2      POS  float   xyzw
            //
            vs_4_0
            dcl_input v0.xyzw
            dcl_input v1.xyzw
            dcl_output o0.xyzw
            dcl_output o1.xyzw
            dcl_output_siv  o2.xyzw , position
            mov o0.xyzw, v1.xyzw
            mov o1.xyzw, v1.xyzw
            mov o2.xyzw, v0.xyzw
            ret 
            // Approximately 4 instruction slots used
                    
        };
        GeometryShader = NULL;
        PixelShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // val                  0   xyzw        0     NONE  float   x   
            // val                  1   xyzw        1     NONE  float       
            //
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // SV_Target            0   xyzw        0     NONE  float   xyzw
            //
            ps_4_0
            dcl_input linear v0.x
            dcl_output o0.xyzw
            dcl_temps 1
            mad r0.x, v0.x, v0.x, v0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad r0.x, r0.x, r0.x, r0.x
            mad o0.xyzw, r0.xxxx, r0.xxxx, r0.xxxx
            ret 
            // Approximately 129 instruction slots used
                    
        };
    }
}

technique10 tMadFP4Parallel
{
    pass pVS
    {
        VertexShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // position             0   xyzw        0     NONE  float   xyzw
            // val                  0   xyzw        1     NONE  float   xyzw
            //
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // val                  0   xyzw        0     NONE  float   xyzw
            // SV_Position          0   xyzw        1      POS  float   xyzw
            //
            vs_4_0
            dcl_input v0.xyzw
            dcl_input v1.xyzw
            dcl_output o0.xyzw
            dcl_output_siv  o1.xyzw , position
            dcl_temps 2
            mad r0.xyzw, v0.xyzw, v0.xyzw, v0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r1.xyzw, v1.xyzw, v1.xyzw, v1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mul o0.xyzw, r0.xyzw, r1.xyzw
            mov o1.xyzw, l(0.000000, 0.000000, 0.000000, -1.000000)
            ret 
            // Approximately 130 instruction slots used
                    
        };
        GeometryShader = NULL;
        PixelShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // no Input
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // SV_Target            0   xyzw        0     NONE  float   xyzw
            //
            ps_4_0
            dcl_output o0.xyzw
            mov o0.xyzw, l(0, 0, 0, 0)
            ret 
            // Approximately 2 instruction slots used
                    
        };
    }
    pass pPS
    {
        VertexShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // position             0   xyzw        0     NONE  float   xyzw
            // val                  0   xyzw        1     NONE  float   xyzw
            //
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // val                  0   xyzw        0     NONE  float   xyzw
            // val                  1   xyzw        1     NONE  float   xyzw
            // SV_Position          0   xyzw        2      POS  float   xyzw
            //
            vs_4_0
            dcl_input v0.xyzw
            dcl_input v1.xyzw
            dcl_output o0.xyzw
            dcl_output o1.xyzw
            dcl_output_siv  o2.xyzw , position
            mov o0.xyzw, v1.xyzw
            mov o1.xyzw, v1.xyzw
            mov o2.xyzw, v0.xyzw
            ret 
            // Approximately 4 instruction slots used
                    
        };
        GeometryShader = NULL;
        PixelShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // val                  0   xyzw        0     NONE  float   xyzw
            // val                  1   xyzw        1     NONE  float   xyzw
            //
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // SV_Target            0   xyzw        0     NONE  float   xyzw
            //
            ps_4_0
            dcl_input linear v0.xyzw
            dcl_input linear v1.xyzw
            dcl_output o0.xyzw
            dcl_temps 2
            mad r0.xyzw, v0.xyzw, v0.xyzw, v0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            mad r1.xyzw, v1.xyzw, v1.xyzw, v1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            mul o0.xyzw, r0.xyzw, r1.xyzw
            ret 
            // Approximately 129 instruction slots used
                    
        };
    }
}

technique10 tSqrtFP1Serial
{
    pass pVS
    {
        VertexShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // position             0   xyzw        0     NONE  float   x   
            // val                  0   xyzw        1     NONE  float       
            //
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // val                  0   xyzw        0     NONE  float   xyzw
            // SV_Position          0   xyzw        1      POS  float   xyzw
            //
            vs_4_0
            dcl_input v0.x
            dcl_output o0.xyzw
            dcl_output_siv  o1.xyzw , position
            dcl_temps 1
            sqrt r0.x, v0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt o0.xyzw, r0.xxxx
            mov o1.xyzw, l(0.000000, 0.000000, 0.000000, -1.000000)
            ret 
            // Approximately 130 instruction slots used
                    
        };
        GeometryShader = NULL;
        PixelShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // no Input
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // SV_Target            0   xyzw        0     NONE  float   xyzw
            //
            ps_4_0
            dcl_output o0.xyzw
            mov o0.xyzw, l(0, 0, 0, 0)
            ret 
            // Approximately 2 instruction slots used
                    
        };
    }
    pass pPS
    {
        VertexShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // position             0   xyzw        0     NONE  float   xyzw
            // val                  0   xyzw        1     NONE  float   xyzw
            //
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // val                  0   xyzw        0     NONE  float   xyzw
            // val                  1   xyzw        1     NONE  float   xyzw
            // SV_Position          0   xyzw        2      POS  float   xyzw
            //
            vs_4_0
            dcl_input v0.xyzw
            dcl_input v1.xyzw
            dcl_output o0.xyzw
            dcl_output o1.xyzw
            dcl_output_siv  o2.xyzw , position
            mov o0.xyzw, v1.xyzw
            mov o1.xyzw, v1.xyzw
            mov o2.xyzw, v0.xyzw
            ret 
            // Approximately 4 instruction slots used
                    
        };
        GeometryShader = NULL;
        PixelShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // val                  0   xyzw        0     NONE  float   x   
            // val                  1   xyzw        1     NONE  float       
            //
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // SV_Target            0   xyzw        0     NONE  float   xyzw
            //
            ps_4_0
            dcl_input linear v0.x
            dcl_output o0.xyzw
            dcl_temps 1
            sqrt r0.x, v0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt r0.x, r0.x
            sqrt o0.xyzw, r0.xxxx
            ret 
            // Approximately 129 instruction slots used
                    
        };
    }
}

technique10 tMiscFP5Instr
{
    pass pVS
    {
        VertexShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // position             0   xyzw        0     NONE  float   xyzw
            // val                  0   xyzw        1     NONE  float   xyzw
            //
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // val                  0   xyzw        0     NONE  float   xyzw
            // SV_Position          0   xyzw        1      POS  float   xyzw
            //
            vs_4_0
            dcl_input v0.xyzw
            dcl_input v1.xyzw
            dcl_output o0.xyzw
            dcl_output_siv  o1.xyzw , position
            dcl_temps 2
            mul r0.x, v0.x, v0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mad r1.x, v0.y, v0.y, v0.y
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r0.y, r1.x, r1.x, r1.x
            min r1.x, v0.z, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r0.z, r1.x, v1.y
            max r1.x, v0.w, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r0.w, r1.x, v1.y
            sqrt r1.x, v1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            mov r1.yzw, v1.yyzw
            dp4 r0.x, r0.xyzw, r1.xyzw
            mov o0.xyzw, r0.xxxx
            mov o1.xyzw, l(0.000000, 0.000000, 0.000000, -1.000000)
            ret 
            // Approximately 325 instruction slots used
                    
        };
        GeometryShader = NULL;
        PixelShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // no Input
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // SV_Target            0   xyzw        0     NONE  float   xyzw
            //
            ps_4_0
            dcl_output o0.xyzw
            mov o0.xyzw, l(0, 0, 0, 0)
            ret 
            // Approximately 2 instruction slots used
                    
        };
    }
    pass pPS
    {
        VertexShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // position             0   xyzw        0     NONE  float   xyzw
            // val                  0   xyzw        1     NONE  float   xyzw
            //
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // val                  0   xyzw        0     NONE  float   xyzw
            // val                  1   xyzw        1     NONE  float   xyzw
            // SV_Position          0   xyzw        2      POS  float   xyzw
            //
            vs_4_0
            dcl_input v0.xyzw
            dcl_input v1.xyzw
            dcl_output o0.xyzw
            dcl_output o1.xyzw
            dcl_output_siv  o2.xyzw , position
            mov o0.xyzw, v1.xyzw
            mov o1.xyzw, v1.xyzw
            mov o2.xyzw, v0.xyzw
            ret 
            // Approximately 4 instruction slots used
                    
        };
        GeometryShader = NULL;
        PixelShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // val                  0   xyzw        0     NONE  float   xyzw
            // val                  1   xyzw        1     NONE  float   xyzw
            //
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // SV_Target            0   xyzw        0     NONE  float   xyzw
            //
            ps_4_0
            dcl_input linear v0.xyzw
            dcl_input linear v1.xyzw
            dcl_output o0.xyzw
            dcl_temps 2
            mul r0.x, v0.x, v0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mul r0.x, r0.x, r0.x
            mad r1.x, v0.y, v0.y, v0.y
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r1.x, r1.x, r1.x, r1.x
            mad r0.y, r1.x, r1.x, r1.x
            min r1.x, v0.z, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r1.x, r1.x, v1.y
            min r0.z, r1.x, v1.y
            max r1.x, v0.w, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r1.x, r1.x, v1.y
            max r0.w, r1.x, v1.y
            sqrt r1.x, v1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            sqrt r1.x, r1.x
            mov r1.yzw, v1.yyzw
            dp4 r0.x, r0.xyzw, r1.xyzw
            mov o0.xyzw, r0.xxxx
            ret 
            // Approximately 324 instruction slots used
                    
        };
    }
}

technique10 tMadI1Serial
{
    pass pVS
    {
        VertexShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // position             0   xyzw        0     NONE  float   x   
            // val                  0   xyzw        1     NONE  float       
            //
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // val                  0   xyzw        0     NONE    int   xyzw
            // SV_Position          0   xyzw        1      POS  float   xyzw
            //
            vs_4_0
            dcl_input v0.x
            dcl_output o0.xyzw
            dcl_output_siv  o1.xyzw , position
            dcl_temps 1
            ftoi r0.x, v0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad o0.xyzw, r0.xxxx, r0.xxxx, r0.xxxx
            mov o1.xyzw, l(0.000000, 0.000000, 0.000000, -1.000000)
            ret 
            // Approximately 131 instruction slots used
                    
        };
        GeometryShader = NULL;
        PixelShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // no Input
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // SV_Target            0   xyzw        0     NONE  float   xyzw
            //
            ps_4_0
            dcl_output o0.xyzw
            mov o0.xyzw, l(0, 0, 0, 0)
            ret 
            // Approximately 2 instruction slots used
                    
        };
    }
    pass pPS
    {
        VertexShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // position             0   xyzw        0     NONE  float   xyzw
            // val                  0   xyzw        1     NONE  float       
            //
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // val                  0   xyzw        0     NONE    int   xyzw
            // val                  1   xyzw        1     NONE    int   xyzw
            // SV_Position          0   xyzw        2      POS  float   xyzw
            //
            vs_4_0
            dcl_input v0.xyzw
            dcl_output o0.xyzw
            dcl_output o1.xyzw
            dcl_output_siv  o2.xyzw , position
            dcl_temps 1
            ftoi r0.xyzw, v0.xyzw
            mov o0.xyzw, r0.xyzw
            mov o1.xyzw, r0.xyzw
            mov o2.xyzw, v0.xyzw
            ret 
            // Approximately 5 instruction slots used
                    
        };
        GeometryShader = NULL;
        PixelShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // val                  0   xyzw        0     NONE    int   x   
            // val                  1   xyzw        1     NONE    int       
            //
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // SV_Target            0   xyzw        0     NONE    int   xyzw
            //
            ps_4_0
            dcl_input constant v0.x
            dcl_output o0.xyzw
            dcl_temps 1
            imad r0.x, v0.x, v0.x, v0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad r0.x, r0.x, r0.x, r0.x
            imad o0.xyzw, r0.xxxx, r0.xxxx, r0.xxxx
            ret 
            // Approximately 129 instruction slots used
                    
        };
    }
}

technique10 tMadI4Parallel
{
    pass pVS
    {
        VertexShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // position             0   xyzw        0     NONE  float   xyzw
            // val                  0   xyzw        1     NONE  float   xyzw
            //
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // val                  0   xyzw        0     NONE    int   xyzw
            // SV_Position          0   xyzw        1      POS  float   xyzw
            //
            vs_4_0
            dcl_input v0.xyzw
            dcl_input v1.xyzw
            dcl_output o0.xyzw
            dcl_output_siv  o1.xyzw , position
            dcl_temps 2
            ftoi r0.xyzw, v0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            ftoi r1.xyzw, v1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imul null, o0.xyzw, r0.xyzw, r1.xyzw
            mov o1.xyzw, l(0.000000, 0.000000, 0.000000, -1.000000)
            ret 
            // Approximately 132 instruction slots used
                    
        };
        GeometryShader = NULL;
        PixelShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // no Input
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // SV_Target            0   xyzw        0     NONE  float   xyzw
            //
            ps_4_0
            dcl_output o0.xyzw
            mov o0.xyzw, l(0, 0, 0, 0)
            ret 
            // Approximately 2 instruction slots used
                    
        };
    }
    pass pPS
    {
        VertexShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // position             0   xyzw        0     NONE  float   xyzw
            // val                  0   xyzw        1     NONE  float       
            //
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // val                  0   xyzw        0     NONE    int   xyzw
            // val                  1   xyzw        1     NONE    int   xyzw
            // SV_Position          0   xyzw        2      POS  float   xyzw
            //
            vs_4_0
            dcl_input v0.xyzw
            dcl_output o0.xyzw
            dcl_output o1.xyzw
            dcl_output_siv  o2.xyzw , position
            dcl_temps 1
            ftoi r0.xyzw, v0.xyzw
            mov o0.xyzw, r0.xyzw
            mov o1.xyzw, r0.xyzw
            mov o2.xyzw, v0.xyzw
            ret 
            // Approximately 5 instruction slots used
                    
        };
        GeometryShader = NULL;
        PixelShader = asm {

            //
            // Generated by Microsoft (R) HLSL Shader Compiler
            //
            //
            //
            // Input signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // val                  0   xyzw        0     NONE    int   xyzw
            // val                  1   xyzw        1     NONE    int   xyzw
            //
            //
            // Output signature:
            //
            // Name             Index   Mask Register SysValue Format   Used
            // ---------------- ----- ------ -------- -------- ------ ------
            // SV_Target            0   xyzw        0     NONE    int   xyzw
            //
            ps_4_0
            dcl_input constant v0.xyzw
            dcl_input constant v1.xyzw
            dcl_output o0.xyzw
            dcl_temps 2
            imad r0.xyzw, v0.xyzw, v0.xyzw, v0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r0.xyzw, r0.xyzw, r0.xyzw, r0.xyzw
            imad r1.xyzw, v1.xyzw, v1.xyzw, v1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imad r1.xyzw, r1.xyzw, r1.xyzw, r1.xyzw
            imul null, o0.xyzw, r0.xyzw, r1.xyzw
            ret 
            // Approximately 129 instruction slots used
                    
        };
    }
}

